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NCP5608 Multiple LED Charge Pump Driver
The NCP5608 is a high efficiency boost converter operating in current loop, based on a charge pump multi mode, to drive White LED. The current mode regulation allows a uniform and programmable brightness of the LEDs. The chip has been optimized for small ceramic capacitors, capable to supply up to 2.0 W output power.
Features http://onsemi.com MARKING DIAGRAM
24 1 24 PIN TQFN (4x4) MT SUFFIX CASE 511AA A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package NCP 5608 ALYW G
* * * * * * * * * * * * * * * * * *
2.7 to 5.5 V Input Voltage Range Up to 500 mA Output Current Capable to Drive 8 LED Multi Mode Charge Pump Based Converter I2C Serial Link Protocol Consistent High Efficiency Independently Block Programmable Output Currents Programmable 3 or 4 Operating Backlight LED at Zero Extra Losses Constant Output Current Regulation Built-in Dimming Function Tight Automatic LED Current Matching Thermal Shutdown Protection Low Battery Return Noise This is a Pb-Free Device*
PIN CONNECTIONS
PVbat 19 18 VOUT 17 C1P 16 C1N 15 LED8 14 LED7 13 PGND 7 LED1 8 LED2 9 LED3 10 LED4 11 LED5 12 LED6 Shipping 4000 / Tape & Reel AVbat C3N C2N 20 C3P 22 C2P 21
24 AGND 1 IREFFL 2 IREFBK 3 SDA 4 SCL 5 CCMP 6
23
Typical Applications
LED Display Back Light Control Keyboard Back Light High Power Photo Flash Multiple Displays
ORDERING INFORMATION
Device NCP5608MTR2G Package TQFN24 (Pb-Free)
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
(c) Semiconductor Components Industries, LLC, 2006
1
June, 2006 - Rev. 1
Publication Order Number: NCP5608/D
NCP5608
+VCC C3 C6 22 4.7 mF/16 V 21 1 mF/16 V C2 C2P 23 GND 1 mF/16 V C3P Vbat
C3N
C5 GND 4.7 mF/16 V AVbat 24 GND 19 18 7 8 9 10 11 12 14 15 VOUT D1 LWY87S D2 D3 LWY87S D4 D5 LWG6SG D6 D7 LWG6SG D8 4.7 mF/16 V C4
U1 NCP5608 20 17 C2N C1P VOUT 16 6 CIN 4 x 25 mA CCMP LED1 LED2 LED3 LED4 LED5 4 x 100 mA LED6 LED7 LED8 PVbat
TP2 VOUT
1 mF/16 V
C1
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8
MCU I2C PORT
R1 5.6 k
R2 5.6 k
LWY87S
5 SCL 4 IREFBK 3 IREFFL 2 SDA IREFBK IREFFL AGND PGND
LWY87S
GND R3 7.5 k Z1 GND R4 7.5 k 1 13
LWG6SG
LWG6SG
GND
Figure 1. Typical Application
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NCP5608
C1 C2 C3
16
17
20
21
22
23
PVbat
19
CHARGE PUMP CONVERTER
18
VOUT
Vbat AVbat 24 IREFBK IREFFL AGND 3 2 1 BKL-A BKL-A CURRENT MIRRORS BACKLIGHT
30 mA
13 LED1 7
ANALOG CONTROL
GND Vbat
30 mA
PWFL-A
13 LED2 8
30 mA
13 LED3 9
30 mA
BKL CCMP SCL SDA 6 5 4
10 13 LED4
DIGITAL CONTROL
Vbat PWFL CURRENT MIRRORS PWR FLASH PWFL-A 100 mA 13 LED5 11
Vbat
100 mA
12 13 LED6
THERMAL SHUTDOWN
100 mA
17 13 LED7
100 mA
15 13 LED8
13 PGND GND
Figure 2. NCP5608 Block Diagram
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NCP5608
PIN FUNCTION DESCRIPTION
Pin 1 Symbol AGND Type GROUND Description This pin is the NCP5608 analog ground and shall be connected to the system ground. Care must be observed to minimize the total parasitic inductance between the pin and the ground plane. This pin is used to set up the current reference for the FLASH output currents (LED5 to LED8). The reference current is derived from the internal bandgap voltage to ground by means of an external resistor. (Note 1) This pin is used to set up the current reference for the BACK LIGHT output currents (LED1 to LED4). The reference current is derived from the internal bandgap voltage to ground by means of an external resistor. (Note 1) This pin, associated with the SCL signal, carries the DATA signal to set up the selected output LED current. The DATA signal is built with a single SDA line to support the I2C protocol. This is the clock signal associated with the SDA pins. The pin carries the standard CLOCK signal to operate the I2C protocol. This pin is connected to the internal I2C bias network and must be either left open, or bypassed to ground by a 10 nF ceramic capacitor when the I2C voltage drops below 1.8 V. Such a capacitor compensate the voltage drop during normal operation, keeping in mind it is not mandatory when the I2C voltage is 1.8 V and above. This pin sinks to ground the current flowing into the first LED, and is intended to be used in backlight application. The current is limited to 30 mA max. (Note 2) This pin sinks to ground the current flowing into the second LED, and is intended to be used in backlight application. The current is limited to 30 mA max. (Note 2) This pin sinks to ground the current flowing into the third LED, and is intended to be used in backlight application. The current is limited to 30 mA max. (Note 2) This pin sinks to ground the current flowing into the fourth LED, and is intended to be used in backlight application. The current is limited to 30 mA max. (Note 2) On the other hand, LED4 can be disconnected when only three LEDs are used in the backlight application. (Table 1) This pin sinks to ground the current flowing into the fifth LED (100 mA max), and is intended to be used in Flash application. (Note 2) This pin sinks to ground the current flowing into the sixth LED (100 mA max), and is intended to be used in Flash or high power application. (Note 2) This pin provides the ground reference for the power elements and must be connected to the system ground by a heavy track. Using the ground plane technique is strongly recommended. Care must be observed to minimize the total parasitic inductance between the pin and the ground plane. This pin sinks to ground the current flowing into the seventh LED (100 mA max), and is intended to be used in flash or high power application. (Note 2) This pin sinks to ground the current flowing into the eighth LED (100 mA max), and is intended to be used in flash or high power application. (Note 2) This pin is the second side of the C1 fly capacitor. This pin is the first side of the C1 fly capacitor. This pin provides the output power to the external LED. Since the regulation is based on a current loop, the voltage will varies as the output current varies in the application. The Vout pin must be bypassed to GND by a 4.7 mF ceramic capacitor. (Note 3) This pin provides the supply voltage to the charge pump converter. The pin must be connected to the AVbat supply source and bypassed to GND by a 10 mF/16 V ceramic capacitor. (Note 3) Using a power plane is recommended. This pin is the second side of the C2 fly capacitor. This pin is the first side of the C2 fly capacitor. This pin is the second side of the C3 fly capacitor. This pin is the first side of the C3 fly capacitor. This pin provides the supply voltage to the analog and digitals blocks. The pin must be connected to the PVbat supply source and bypassed to GND by a 1 mF/16 V ceramic capacitor. (Note 3) Using a power plane is recommended.
2
IREFFL
OUTPUT, ANALOG
3
IREFBK
OUTPUT, ANALOG
4
SDA
INPUT, DIGITAL
5 6
SCL CCMP
INPUT, DIGITAL ANALOG, INPUT
7 8 9 10
LED1 LED2 LED3 LED4
INPUT, POWER INPUT, POWER INPUT, POWER INPUT, POWER
11 12 13
LED5 LED6 PWRGND
INPUT, POWER INPUT, POWER POWER
14 15 16 17 18
LED7 LED8 C1N C1P VOUT
INPUT, POWER INPUT, POWER POWER POWER OUTPUT, POWER
19
PVBAT
INPUT, POWER
20 21 22 23 24
C2N C2P C3P C3N AVbat
POWER POWER POWER POWER INPUT, POWER
1. To achieve a good accuracy of the LED current, 1% tolerance resistor, with 100 ppm stability, or better, shall be used. The reference current is internally mirrored and sized according to the programmed value for a given external LED. 2. Total DC-DC output current is limited to 500 mA. 3. Ceramic X7R, ESR < 50 mW ESL < 0.5 nH, SMD types capacitors are mandatory to achieve the Iout specifications. On the other hand, care must be observed to take into account the DC bias impact on the capacitance value; see ceramic capacitor manufacturer data sheets.
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NCP5608
MAXIMUM RATINGS
Rating Power Supply Digital Input Voltage Digital Input Current ESD Capability (Note 4) Human Body Model (HBM) Machine Model (MM) QFN24 Package Power Dissipation @ TA = +85C (Note 5) Thermal Resistance, Junction-to-Air (according to JEDEC/EIA JESD51-12) Operating Ambient Temperature Range Operating Junction Temperature Range Maximum Junction Temperature Storage Temperature Range Latchup Current Maximum Rating (per JEDEC standard: JESD78) Class II Moisture Sensitivity Level (Note 6) Symbol Vbat SDA, SCL - VESD 2.0 200 PD RqJA TA TJ TJmax Tstg - MSL 250 160 -40 to +85 -40 to +125 +150 -65 to +150 "100 1 kV V mW C/W C C C C mA - Value 7.0 -0.3 v Vin v VBAT + 0.3 1.0 Unit V V mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 4. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM): JESD22-A114. Machine Model (MM): JESD22-A115. 5. The maximum package power dissipation limit must not be exceeded. 6. Moisture Sensitivity Level (MSL): per IPC/JEDEC standard: J-STD-020A.
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NCP5608
POWER SUPPLY SECTION (Typical values are referenced to TA = +25C, Min & Max values are referenced -40C to +85C ambient temperature, unless otherwise noted.)
Pin 19, 24 18 18 18 24 19 Symbol PVbat, AVbat Iout Isch Vout Istdb Iop Power Supply Continuous DC Current in the Load @ Vout = 8xLED, Vbat = 3.4 V Continuous Output Short Circuit Current Output Voltage Compliance (OVP) Standby Current, @ Iout = 0 mA, @ 2.7 V < Vbat < 4.2 V Operating Current, @ Iout > 0 mA PVbat = 3.6 V PVbat = 4.2 V Charge Pump Operating Frequency (Any CFLY Capacitor Pins) Output LED to LED Current Matching, @ Vbat = 3.6 V, ILED = 20 mA, LED1 to LED4 are Identical Output Current Tolerance, LED1 to LED4 @ Vbat = 3.6 V, ILED = 20 mA Output LED to LED Current Matching, @ Vbat = 3.6 V, ILED = 80 mA, LED5 to LED8 are Identical Output Current Tolerance, LED5 to LED8 @ Vbat = 3.6 V, ILED = 80 mA DC-DC Start Time (Cout = 4.7 mF ) - from Vbat Operating to Full Load Operation Thermal Shutdown Protection Thermal Shutdown Protection Hysteresis Rating Min 2.7 500 - 4.8 - - - - 2.0 - 2.0 - - - - Typ - - 60 - - 0.5 0.8 1.3 "0.5 "2.0 "0.5 "2.0 150 160 30 Max 5.5 - 120 5.5 5.0 - - - 2.0 % - % 2.0 % - ms - - - C C MHz % Unit V mA mA V mA mA
Fpwr 7, 8, 9, 10 7, 8, 9, 10 11, 12, 14, 15 11, 12, 14, 15 18 IMAT ITOL IMAT ITOL tstart TSD TSDH
ANALOG SECTION (Typical values are referenced to TA = +25C, Min & Max values are referenced -25C to +85C ambient
temperature, unless otherwise noted.) Pin 3 3 2 2 4, 5 Cin IREFFL Symbol IREFBK Rating Backlight Reference Current @ Vref = 600 mV (Notes 7, 8) Reference Current (IREF) to Backlight Ratio Flash Reference Current @ Vref = 600 mV (Notes 7, 8) Reference Current (IREF) to Flash Ratio Input Capacitance (Parameter not tested, guaranteed by design) Min 1.0 - 1.0 - - Typ - 40 - 40 - Max 100 - 100 - 10 Unit mA - mA - pF
7. The overall output current tolerance depends upon the accuracy of the external resistor. Using 1% or better resistor is recommended. 8. The external circuit must not force the IREF pin voltage either higher or lower than the 600 mV specified.
DIGITAL PARAMETERS SECTION @ 2.70 V v VCC v 5.5 V (TA = -25C to +85C unless otherwise noted.) Note: Digital inputs undershoot v -0.30 V to ground. Digital inputs overshoot v 0.30 V to VCC.
Pin 5 4, 5 4, 5 Symbol FCLK VIH VIL Rating Input I2C Clock, Duty Cycle = 50% Positive-Going Input High Voltage Threshold (SDA, SCL) Negative-Going Input High Voltage Threshold (SDA, SCL) 0.7 0 Min - VCC Typ - - - Max 400 Vcc + 0.5 V 0.4 Unit kHz V V
9. The VCC Bias pins can be either left open, or biased by the same voltage as the external MCU power supply source. An external 10 nF capacitor might be necessary to improve the I2C function when operating with SDA and SCL signal amplitude below 1.8 V. 10. Expernal pullup resistors shall be connected to properly bias the SDA and SCL logic levels according to the I2C specifications.
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NCP5608
APPLICATIONS INFORMATION DC-DC OPERATION The converter is based on a charge pump technique to generate a DC voltage capable to supply the white LED load. The system regulates the current flowing into each LED by means of internal current mirrors associated with the white diodes. Consequently, the output voltage will be equal to the Vf of the LED, plus the 300 mV (typical) developed across the internal NMOS mirror. Typically, assuming a standard white LED forward biased at 10 mA, the output voltage will be 3.2 V. The third external capacitor makes possible the 1.33X extra mode of operation, with a significant efficiency improvement of the converter over the normal battery voltage span. The threshold levels have been defined to optimize this range of operating voltages, assuming a high efficiency is not relevant when the system is connected to a battery charger (i.e. Vbat > 4.5 V). The built-in OVP circuit continuously monitors each output and stops the converter when the voltage is above 5.0 V. The converter resumes normal operation when the voltage drops below 5.0 V (no latch-up mechanism). Consequently, the chip can operate with no load during any test procedures, but in the case of special applications, it is recommended to connect the unused LED driver either to the VOUT supply to avoid any uncontrolled operation. The structure is built with power MOS devices to accommodate the modes selected by the analog functions. The current flowing into each LED is continuously regulated according to the value defined by the programming message. The total current is limited to 500 mA DC. The system runs with two cycles: - Cycle#1 Fly capacitors are charged from the battery. - Cycle#2 Energy accumulated into the fly capacitors is transferred to the load.
Li-Ion 2.90 V - 4.10 V PIN 19 GND
Q1 C1N PIN 16 Q2 C1
Q3 C1P PIN 17 Q4 Q5
Q6 C2N PIN 20 C2
Q7 C2P PIN 21 Q8 Q9
Q10 C3N PIN 23 C3
Q11 C3P PIN 22 Q12
CURRENT CONTROL GND
LEDx
VOUT PIN 18
PWRGND PIN 13 GND
Figure 3. Basic DC-DC NCP5608 Converter Structure
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NCP5608
LOAD CURRENT CALCULATION The load current is derived from the 600 mV reference voltage provided by the internal band gap associated to the external resistor connected across the IREFBK and IREFFL pins and GND (see Figure 4). In any case, no voltage shall be forced at IREFBK or IREFFL pins, either downward or upward. The backlight block, LED1 - LED4, is powered by the current reference defined at the IREFBK pin. The output current can be dimmed by means of a dynamic modulation of the IREFBK pin. The IREFBK reference current is multiplied by the constant ka to yield the output backlight LED load current. Since the reference voltage is based on a temperature compensated bandgap, a tight tolerance resistor will provide a very accurate load current. The ka parameter is derived from the constant 40 multiplied by the binary defined in the PWRLED_BK register. Consequently, ka varies from 40 (1.0 mA output/LED) to 1200 to support the full output current range. The resistor is calculated from the Ohm's law (R = Vref/I REF) and a more practical equation can be arranged to define the resistor value for a given output current: Let Iout = 4*ILED, then:
RBK + (Vref * ka * 30) Iout RBK + (0.6 * 1200) Iout RBK + 720 Iout
(eq. 1) Vbat BOOST CONVERTER VOUT PIN 18
+ -
600 mV
LEDx
PWRGND PIN 13 ANALOG CONTROL PIN 3 IREFBK R1 GND
GND
Figure 4. Typical Backlight Reference Current Operation (Similar Circuit Applies for Power Flash Section)
Note: Due to relative high impedance connected at the reference current pins, cares must be observed to minimize the noise pick-up and stray current present at PCB level. Multi layer layout, with dedicated ground screen, is mandatory. SERIAL LINK I2C PROTOCOL The chip is remotely controlled by means of a byte transferred along a serial link between the MCU and the NCP5608. The industrial standard I2C protocol is used, although one can drive the SCL and SDA signal from standard MCU I/O pins . Two dedicated internal registers are used to decode the SDA content and to store the output currents. The I2C message carries three bytes within the same frame: Byte #1: The content of this byte is the physical address of the NCP5608 in the I2C bus. Byte #2: The content of this byte contains the address of the selected block. Byte #3: This byte contains the output current value to set up the selected block.
Consequently, the resistor value will range between RBK = 720/(30 mA*4) = 6000 W and RBK = 720/(0.5 mA*4) = 360 kW for the low power block. Similarly, the PowerFlash block, LED5-LED8, is powered by the current reference defined at the IREFFL pin. The same calculation as before applies, assuming kb = 40, the maximum output current being 100 mA/LED: Let Iout = 4*ILED, then:
RFL + (Vref * kb * 100) Iout RFL + (0.6 * 4000) Iout RFL + 2400 Iout
(eq. 2)
Finally, the resistor value will range between RFL = 2400/(100 mA*4) = 6000 W and RFL = 2400/(1 mA*4) = 600 kW for the High Power Flash block. On the other hand, the output currents can be dimmed by means of a dynamic modulation of their respective IREFBK/IREFFL pins current references. Obviously, the tolerance of such resistors must be 1% or better, with a 100 ppm thermal coefficient, to get the expected overall tolerance.
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NCP5608
In order to improve the efficiency of the back light block when three LED only are used, one can disconnect the
Table 1. Programming Table
Byte Byte #1 Byte #2 Byte #2 Byte #3 B7 0 0 0 1 B6 1 0 0 0 B5 1 0 0 0 B4 1 0 0 X B3 0 0 0 X B2 0 0 0 X B1 1 0 1 X B0 0 1 0 X This is the I2C address $01 = Select the Back Light internal register $02 = Select the Power Flash internal register Assuming Byte #2 = $01, then: Bits[0..4] = Back Light output current Bit[5..6] = shall be Low Bit[7] = control the fourth LED in the Back Light Block: B7 = 0 LED 4th disconnect B7 = 1 LED 4th connected Assuming Byte #2 = $02, then: Bits[0..6] = Power Flash output current Bit[7] = shall be Low Comments
fourth LED by setting B6 = Low simultaneously with the third byte (see Table 1).
Byte #3
0
X
X
X
X
X
X
X
LED CURRENT CONTROL REGISTERS The eight LED are split in two blocks: Back Light Block: Flash or High Power Block: LED1 to LED4, current limited to 30 mA per LED5 to LED8, current limited to 100 mA per LED LED The programmed value of a given bank of LED is memorized into the appropriate registers. There is one register for each set of LED: PWRLED_BK[0..4] PWRLED_FL[0..6] Stores the Back Light output current. Stores the Power Flash output current. The total output current is limited to 500 mA, whatever be the configuration.
Table 2. Internal LED Current Control Register
Internal LEDs registers B7 B6 RFU (Note 11) 64 B5 RFU (Note 11) 32 B4 16 16 Bit B3 8.0 8.0 B2 4.0 4.0 B1 2.0 2.0 B0 1.0 1.0 mA mA Unit
PWRLED_BK[7..0] PWRLED_FL[7..0]
BLED4 (Note 12) RFU (Note 11)
11. Reserved for future use. 12. Activates/deactivates LED4.
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NCP5608
OUTPUT LED PROGRAMMING SEQUENCE Once the maximum output current has been set up by the external resistor (see Load Current Calculation paragraph above), the I2C protocol can be used to dynamically adjust the brightness of the selected block. At this point, the dimming of each block depends upon the content of the appropriate register (PWRLD_BK[4..0] or PWRLED_FL[6..0]). The LED current can be calculated according to the digital value stored into the registers. The LED can be programmed in four steps: 1. Define the maximum ILEDBK-MAX and ILEDFL-MAX currents requested by the Back Light and Flash applications (set by external resistors). This is the maximum current that will be reached when the registers will be at their respective full range (PWRLD_BK[4..0] = $1F = 31 Decimal, PWRLED_FL[6..0] = $7F= 127 decimal). 2. Calculate the reference current (Irefbk and Ireffl ): Irefbk = ILED-BK/1200 and Ireffl = ILED-FL/4000 3. Calculate the external resistor value RBK = 0.6/Irefbk RFL = 0.6/Ireffl 4. The dimming of flash and backlight LED will be now achieved by changing the PWRLD_BK[4..0] and PWRLED_FL[6..0] registers content to get the operating LED current along the curves 0 mA to ILED-BK-MAX mA and 0 mA to ILED-FL mA: BK-NSteps = number of steps stored into the PWRLD_BK register (value, in decimal, of the PWRLD_BK[4..0] register) FL-NSteps = number of steps stored into the PWRLED_FL register (value, in decimal, of the PWRLD_FL[6..0] register) ILEDBK = (ILEDBK-MAX/31) * BK-NSteps ILEDFL = (ILEDFL-MAX/127) * FL-NSteps
PHYSICAL ADDRESS The physical I2C address dedicated to the NCP5608 to support the I2C protocol is: 0111 001X $72. The external controller must fulfill the I2C protocol to drive the chip: see I2C-BUS SPECIFICATION, Version 2.1. The NCP5608 operates as a Slave only and never takes over the I2C control.
Table 3. NCP5608 Operation Truth Table
PWRLED_BK (0-7) $00 >$80 >$00 X PWRLED_FL (0-7) $00 X X >$00 Output Voltage Forced to zero Vfbk + Vsense Vfbk + Vsense Vffl + Vsense DC-DC = OFF DC-DC = ON, LED1 to LED4 active DC-DC = ON, LED1 to LED3 active LED4 deactivated DC-DC = ON Comments
The I2C protocol is based on the standard format defined in the industry. Basically, the DATA is transferred from the MCU to the NCP5608 registers by means of the SDA message associated to the SCL clock. The MCU presents
the 8 bits during the low state of the SCK signal and the peripheral device ( in our case, the NCP5608) shall reads the bits during the high state of the same clock. The transfer is MSB first as depicted in Figure 5.
MPU send bit PHYSICAL ADDRESS FRAME MPU enables clock B7 CLOCK The NCP5608 reads one bit DATA Stop The NCP5608 send ACK NOTE: See I2C-BUS SPECIFICATION, Version 2.1, January 2000, for further timing details. B6 B5 B4 B3 B2 B1 B0 ACK B7 B6 B5 B4 B3 B2 B1 B0 ACK DATA FRAME
Start
Figure 5. Basic I2C Timings
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NCP5608
The three bytes, defined to program the chip, must be sent during the same transaction as depicted in Figure 6 and Figure 7. Leaving aside the ACK signal, the NCP5608 does not provide any digital feedback. The selected PWRLED-BK or PWRLED-FL register described above will be updated according to the content of the third byte serially sent to the chip. Finally, the selected bank of LED will be updated on the last I2C clock positive going slope of the third byte, the DATA being transferred to the appropriate latchup register as defined by the content of the second byte. The DC-DC charge pump is deactivated when both registers are set to zero as depicted in Table 3.
Figure 6. Typical Transaction I2C Sequence: I2C Address
Figure 7. Typical Full I2C Data Transfer
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NCP5608
TYPICAL OPERATING CHARACTERISTICS
90 Iout = 60 mA 85 Iout = 100 mA 80 80 Iout = 80 mA Iout = 40 mA 85 Iout = 200 mA Iout = 120 mA 90 Iout = 80 mA Iout = 40 mA
75
75
70 EFFPLED (%) EFFPLED (%)
70
65 Iout = 20 mA 60
65
60
55
55
50
50
45 4.4
4.2
4.0
3.8 3.6 Vbat (V)
3.4
3.2
3.0
45 4.4
4.2
4.0
3.8 3.6 Vbat (V)
3.4
3.2
3.0
Figure 8. Back Light Efficiency vs. Battery Voltage (LED1 to LED4)
Figure 9. Power Flash Efficiency vs. Battery Voltage (LED5 to LED8)
Vbat = 4.2 V 80 Iout = 300 mA 75 70 EFFPLED (%) 65 60 55 50 45 4.4 Iout TOL (%) Iout = 400 mA 4 2 0 25C -2 -4 -6 4.2 4.0 3.8 3.6 3.4 3.2 3.0 Vbat (V) 85C -40C 6
0
20
40
60
80 Iout (mA)
100
120
140
160
Figure 10. Power Flash Efficiency vs. Battery Voltage (LED5 to LED8) at Full Power
Figure 11. Back Light Output Current Tolerance (LED1 to LED4)
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NCP5608
TYPICAL OPERATING WAVEFORMS
6 4 Iout TOL (%) 2 0 -2 -4 -6 25C Vbat = 4.2 V
0
50
100
150
200 250 Iout (mA)
300
350
400
450
Figure 12. Power Flash Output Current Tolerance (LED5 to LED8)
Figure 13. Typical Powerup Response
+VCC C3 C6 22 4.7 mF/16 V 21 1 mF/16 V C2 C2P 23 GND 1 mF/16 V C3P
Vbat
C3N
C5 GND 4.7 mF/16 V AVbat 24 GND 19 18 7 8 9 10 11 12 14 15 VOUT D1 LWY87S D2 D3 LWY87S D4 D5 LWG6SG D6 D7 LWG6SG D8 4.7 mF/16 V C4
U1 NCP5608 20 17 C2N C1P VOUT 16 6 CIN 4 x 25 mA CCMP LED1 LED2 LED3 LED4 LED5 4 x 100 mA LED6 LED7 LED8 PVbat
TP2 VOUT
1 mF/16 V
C1
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8
MCU I2C PORT
R1 5.6 k
R2 5.6 k
LWY87S
5 SCL 4 IREFBK 3 IREFFL 2 SDA IREFBK IREFFL AGND PGND
LWY87S
GND R3 6.2 k Z1 GND R4 6.2 k 1 13
LWG6SG
LWG6SG
GND
Figure 14. Typical Application
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NCP5608
Table 4. Recommended Passive Parts
Part Ceramic Cap. 1 F/16 V Ceramic Cap. 4.7 F/6.3 V Ceramic Cap. 10 F/6.3 V TDK TDK TDK Manufacturer Description Footprint 0805 Footprint 1206 Footprint 1206 Part Number C2012X5R1C105MT C3216X5R1C475MT C3216X5R1C106MT
TYPICAL LEDS LOAD MAPPING
C5 GND 4.7 mF Vout Vout 4.7 mF C5 GND
D1
D2
D3
D4
D5
D6
D7
D8
D1
D2
D3
D4
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 GND
GND
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 GND
GND
Figure 15. Examples of Possible LED Connections
C5 GND 4.7 mF Vout Vout
C5 GND 4.7 mF Vout
C5 GND 4.7 mF
D1
D2
D3
D4
D1
D2
D3
D4
D5
D5 LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 GND GND D1
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 GND
GND
LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 GND
GND
Figure 16. Examples of Possible LED Arrangements
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NCP5608
VCC J1 1 2 PWR GND +C1 220 mF/10 V 21 GND C3 1 mF/6.3 V 22 C2 1 mF/6.3 V C3P 23 C3N
C2P
C5 4.7 mF/10 V AVbat 24 19 18 VOUT
GND C6 GND 4.7 mF/16 V
U1 NCP5608 20 17 C2N C1P VOUT 16 6 PVbat
TP1 VOUT
VCC C4
1 mF/6.3 V
10 k
J2 2 4 6 8 10 DIGITAL PORT GND 7.5 k R1 1 3 5 7 9 R3
CIN 4 x 25 mA CCMP SCL SDA
LED1 LED2 LED3 LED4 LED5 4 x 100 mA LED6 LED7 LED8
7 8 9 10 11 12 14 15
LED1 LED2 LED3 LED4 LED5 LED6
D1 LWY87S D3 D2 LWY87S D4 LWY87S LWY87S
10 k R4
SCL 5 SDA 4
IREFFL 3 IREFBK IREFBK 2 IREFFL 1 7.5 k R2 13 AGND PGND
D5 LED7 LED8 LWW5SG GOLDEN DRAGON
Z1 GND
GND
Figure 17. Demo Board Schematic Diagram
ABBREVIATIONS FB POR I2C SDA SCL REGBL REGFL FeedBack Power On Reset: internal pulse to reset the chip when the power supply is applied Inter Integrated Chip Communication Serial DATA, Bidirectional line, associated to the I2C protocol Serial Clock, associated to the I2C protocol Register Back Light Register Flash
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NCP5608
PACKAGE DIMENSIONS
24 PIN TQFN, 4X4 CASE 511AA-01 ISSUE O
D
A B
2X
0.15 C
2X
0.15 C
0.10 C A 0.08 C A1 D2 L
7 6 12 13 SEATING PLANE
e/2 K
1 24 19
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
II II II
e
18 24X
PIN ONE REFERENCE
E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MIN 0.70 0.00 0.18 2.40 2.40 0.20 0.30 MILLIMETERS NOM MAX 0.75 0.80 0.03 0.05 0.20 REF 0.25 0.30 4.00 BSC 2.50 2.60 4.00 BSC 2.50 2.60 0.50 BSC --- --- 0.40 0.50
A3
C
20X
E2
b 0.10 C A B 0.05 C
NOTE 3
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16
NCP5608/D

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